A state cannot be entered and exited in the same step. Consider the following figure (a). Assume the system is in state S1 and the condition c is true. When event e is generated, a transition from S1 to S2 is taken. The transition from S2 to S3 is taken only in the next step.
In the following figure, assume the system is in state S1 and condition C is true. When event E is generated, a transition from S1 to S2 is taken. This represents one simulation step. The transition from S2 to S3 is taken only in the next simulation step.
There is a special case in which a state may be exited and then entered in the same step. This happens when the target state and the source state are the same – as in (b) above.